MT5824

Highly Integrated 5G System-on-Chip

Designed for O-RAN Radio Units and Small Cells

Overview

Metanoia’s MT5824 chipset is a highly integrated 5G System-on-Chip (SoC) designed for O-RAN Radio Units (O-RUs) and Small Cells. It features a Software-Defined Radio (SDR) architecture, supporting both sub-6GHz (FR1) and millimeter-wave (FR2) 5G New Radio (NR) standards.

The MT5824 chipset includes an advanced Digital Front End (DFE) with built-in vector DSPs for robust signal processing and high-performance RFICs (transceivers) for seamless system integration.

With O-RAN Split 7.2x compliance and high-speed fronthaul connectivity via dual 10G/25G SerDes, the MT5824 delivers best-in-class performance for cost-effective, power-efficient operation (< 25W for 4T4R FR1) and scalable 5G deployments.

COBRA PCB

Applications

Target Market Segments

Sub-6GHz low density O-RAN RU market (4T4R Low density RU)
Complete end-to-end solution for 5G RU, including Digital Front-End (DFE) for Low-PHY, fronthaul interface as specified by O-RAN, and interface to a sub-6GHz RF chip like Metanoia MT3812.

Use Cases

A single instance of the MT2824 SoC can support 4T4R FR1. The MT2824 SoC supports a scalable architecture, which can help in building higher-density applications (e.g. 8T8R) by using multiple instances of the chip.

Here is an example 4T4R O-RU system that can be built using 1x MT2824 and 2x MT3812.

MT5824 Use Case

Specifications

The MT5824 is a cost-effective and competitive SoC that meets customers’ need to build 5G Radio Unit solutions for the 5G market.

Cobra SoC (MT2824)

Multi-core RISC-V 64-bit processor
DSP cores for physical layer processing
Enhanced Common Public Radio Interface (eCPRI) support
Multiple ADC/DAC interfaces to support FR1 4T4R
LVDS high-speed control Interface for RFIC

Yucca RFIC (MT3812)

Three-band 2×2 MIMO transceiver
Frequency range:
- 2.5–5.0 GHz (FR1)
- extendable to FR2 using as an IF
Supports RF channel bandwidths up to 200 MHz

The features list includes the following items:


Fronthaul Connectivity	Redundant Dual-lane Ethernet PHY configurable for 10 Gbps / 25 Gbps Hardware-accelerated eCPRI header processing
Functional Split	Option 7.2x
Advanced Model Capabilities	Support up to 1024 QAM for DL and 256 QAM for UL (FR1) Mixed numerology and mini-slot integration
Data Converter Integration	4x 2Gsps ADCs/DACs supporting bandwidths up to 400 MHz (Analog IQ)
Power Consumption	4T4R FR1: 4W for SoC, 2W for 2x RFIC enabling PoE+
Timing Synchonization	ITU-T PTP and SyncE standards support IEEE 1588v2 compliance
Open-Source SDK	Semi-Turnkey Software for 4T4R solution M-Plane and RU-Manager software Tools for automated testing and configuration
Advanced Security Features with built-in OTP
Temperature Range	-40 °C to +85°C
Interfaces and Connectivity	High-Speed Ethernet: Dual 10G/25G SerDes Peripheral Interfaces: LVDS, I2C, SPI, UART, USB 2.0, GPIO Memory Support: LPDDR4 with inline ECC Fronthaul Protocols: eCPRI over 10/25 Gbps Ethernet

Supported Configurations

4T4R FR1 O-RU

Bandwidth: Up to 100 MHz @ 491.52 MSPS.
Frequency Bands: n41, n48, n53, n77, n78, n79
Modulation: DL 1024QAM / UL 256QAM

Reference Design

5G FR1 4T4R RU Reference Platform using MT5824 Chipset

The Metanoia MT5824 Evaluation Board (C-EVB) is a 5G RU Sub-6Ghz reference design that uses the MT2824 SoC as a Digital Front End chip. The C-EVB includes two MT3812 RFICs (Metanoia’s 5G Transceiver chip). It also includes additional RF Front End components like PA, LNA, Circulator, Bandpass Filters etc.

The C-EVB is an ideal test platform for both cutting-edge application development and out-of-the-box evaluation. This reference design accelerates time to market for OEMs and ODMs by leveraging HDK, SDK, and Open Radio Access Network (O-RAN) interoperability.